Synchronization Busy
Name:
SYNCBUSY
Offset:
0x20
Reset:
0x00000000
Access:
Read-Only
Bit3130292827262524
Access
Reset
Bit2322212019181716
Access
Reset
Bit15141312111098
Access
Reset
Bit76543210
COMPCTRL1COMPCTRL0WINCTRLENABLESWRST
AccessRRRRR
Reset00000

Bit 2 – WINCTRL: WINCTRL Synchronization Busy

WINCTRL Synchronization Busy

This bit is cleared when the synchronization of the WINCTRL register between the clock domains is complete.

This bit is set when the synchronization of the WINCTRL register between clock domains is started.

Bit 1 – ENABLE: Enable Synchronization Busy

Enable Synchronization Busy

This bit is cleared when the synchronization of the CTRLA.ENABLE bit between the clock domains is complete.

This bit is set when the synchronization of the CTRLA.ENABLE bit between clock domains is started.

Bit 0 – SWRST: Software Reset Synchronization Busy

Software Reset Synchronization Busy

This bit is cleared when the synchronization of the CTRLA.SWRST bit between the clock domains is complete.

This bit is set when the synchronization of the CTRLA.SWRST bit between clock domains is started.

Bits 4,3 – COMPCTRLx: COMPCTRLx Synchronization Busy

COMPCTRLx Synchronization Busy

This bit is cleared when the synchronization of the COMPCTRLx register between the clock domains is complete.

This bit is set when the synchronization of the COMPCTRLx register between clock domains is started.