Data Direction
This register allows the user to configure one or more I/O pins as an input or output. This register can be manipulated without doing a read-modify-write operation by using the Data Direction Toggle (DIRTGL), Data Direction Clear (DIRCLR) and Data Direction Set (DIRSET) registers.
Name:
DIR
Offset:
0x00
Reset:
0x00000000
Access:
PAC Write-Protection
Bit3130292827262524
DIR[31:24]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit2322212019181716
DIR[23:16]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit15141312111098
DIR[15:8]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit76543210
DIR[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 31:0 – DIR[31:0]: Port Data Direction

Port Data Direction

These bits set the data direction for the individual I/O pins in the PORT group.

ValueDescription
0 The corresponding I/O pin in the PORT group is configured as an input.
1 The corresponding I/O pin in the PORT group is configured as an output.