| Bit31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| DIR[31:24] | |||||||
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| DIR[23:16] | |||||||
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| DIR[15:8] | |||||||
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| DIR[7:0] | |||||||
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Port Data Direction
These bits set the data direction for the individual I/O pins in the PORT group.
| Value | Description |
|---|---|
| 0 | The corresponding I/O pin in the PORT group is configured as an input. |
| 1 | The corresponding I/O pin in the PORT group is configured as an output. |