Data Direction Set
This register allows the user to set one or more I/O pins as an output, without doing a read-modify-write operation. Changes in this register will also be reflected in the Data Direction (DIR), Data Direction Toggle (DIRTGL) and Data Direction Clear (DIRCLR) registers.
Name:
DIRSET
Offset:
0x08
Reset:
0x00000000
Access:
PAC Write-Protection
Bit3130292827262524
DIRSET[31:24]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit2322212019181716
DIRSET[23:16]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit15141312111098
DIRSET[15:8]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit76543210
DIRSET[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 31:0 – DIRSET[31:0]: Port Data Direction Set

Port Data Direction Set

Writing '0' to a bit has no effect.

Writing '1' to a bit will set the corresponding bit in the DIR register, which configures the I/O pin as an output.
ValueDescription
0 The corresponding I/O pin in the PORT group will keep its configuration.
1 The corresponding I/O pin in the PORT group is configured as an output.