APBC Mask
Name:
APBCMASK
Offset:
0x1C
Reset:
0x00000000
Access:
PAC Write-Protection
Bit3130292827262524
Access
Reset
Bit2322212019181716
CCLPTCACADC0TC4
AccessR/WR/WR/WR/WR/W
Reset00000
Bit15141312111098
TC3TC2TC1TC0TCC2TCC1TCC0
AccessR/WR/WR/WR/WR/WR/WR/W
Reset0000000
Bit76543210
SERCOM3SERCOM2SERCOM1SERCOM0EVSYS
AccessR/WR/WR/WR/WR/W
Reset00000

Bit 23 – CCL: CCL APBC Clock Enable

CCL APBC Clock Enable

ValueDescription
0 The APBC clock for the CCL is stopped.
1 The APBC clock for the CCL is enabled.

Bit 22 – PTC: PTC APBC Mask Clock Enable

PTC APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the PTC is stopped.
1 The APBC clock for the PTC is enabled.

Bit 20 – AC: AC APBC Clock Enable

AC APBC Clock Enable

ValueDescription
0 The APBC clock for the AC is stopped.
1 The APBC clock for the AC is enabled.

Bit 17 – ADC0: ADC0 APBC Clock Enable

ADC0 APBC Clock Enable

ValueDescription
0 The APBC clock for the ADC0 is stopped.
1 The APBC clock for the ADC0 is enabled.

Bit 16 – TC4: TC4 APBC Mask Clock Enable

TC4 APBC Mask Clock Enable

Bit 15 – TC3: TC3 APBC Mask Clock Enable

TC3 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the TC3 is stopped.
1 The APBC clock for the TC3 is enabled.

Bit 14 – TC2: TC2 APBC Mask Clock Enable

TC2 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the TC2 is stopped.
1 The APBC clock for the TC2 is enabled.

Bit 13 – TC1: TC1 APBC Mask Clock Enable

TC1 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the TC1 is stopped.
1 The APBC clock for the TC1 is enabled.

Bit 12 – TC0: TC0 APBC Mask Clock Enable

TC0 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the TC0 is stopped.
1 The APBC clock for the TC0 is enabled.

Bit 11 – TCC2: TCC2 APBC Mask Clock Enable

TCC2 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the TCC2 is stopped.
1 The APBC clock for the TCC2 is enabled.

Bit 10 – TCC1: TCC1 APBC Mask Clock Enable

TCC1 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the TCC1 is stopped.
1 The APBC clock for the TCC1 is enabled.

Bit 9 – TCC0: TCC0 APBC Mask Clock Enable

TCC0 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the TCC0 is stopped.
1 The APBC clock for the TCC0 is enabled.

Bit 4 – SERCOM3: SERCOM3 APBC Mask Clock Enable

SERCOM3 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the SERCOM3 is stopped.
1 The APBC clock for the SERCOM3 is enabled.

Bit 3 – SERCOM2: SERCOM2 APBC Mask Clock Enable

SERCOM2 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the SERCOM2 is stopped.
1 The APBC clock for the SERCOM2 is enabled.

Bit 2 – SERCOM1: SERCOM1 APBC Mask Clock Enable

SERCOM1 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the SERCOM1 is stopped.
1 The APBC clock for the SERCOM1 is enabled.

Bit 1 – SERCOM0: SERCOM0 APBC Mask Clock Enable

SERCOM0 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the SERCOM0 is stopped.
1 The APBC clock for the SERCOM0 is enabled.

Bit 0 – EVSYS: EVSYS APBC Clock Enable

EVSYS APBC Clock Enable

ValueDescription
0 The APBC clock for the EVSYS is stopped.
1 The APBC clock for the EVSYS is enabled.