AHB Mask
Name:
AHBMASK
Offset:
0x10
Reset:
0x000001CFF
Access:
PAC Write-Protection
Bit3130292827262524
AccessRRRRRRRR
Reset00000000
Bit2322212019181716
AccessRRRRRRRR
Reset00000000
Bit15141312111098
DIVASPAC
AccessRRRR/WRR/W
Reset000111
Bit76543210
DMACHSRAMNVMCTRLHMATRIXHSDSUAPBCAPBBAPBA
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset11111111

Bit 12 – DIVAS: DIVAS AHB Clock Enable

DIVAS AHB Clock Enable

ValueDescription
0 The AHB clock for the DIVAS is stopped.
1 The AHB clock for the DIVAS is enabled.

Bit 10 – PAC: PAC AHB Clock Enable

PAC AHB Clock Enable

ValueDescription
0 The AHB clock for the PAC is stopped.
1 The AHB clock for the PAC is enabled.

Bit 7 – DMAC: DMAC AHB Clock Enable

DMAC AHB Clock Enable

ValueDescription
0 The AHB clock for the DMAC is stopped.
1 The AHB clock for the DMAC is enabled.

Bit 6 – HSRAM: HSRAM AHB Clock Enable

HSRAM AHB Clock Enable

ValueDescription
0 The AHB clock for the HSRAM is stopped.
1 The AHB clock for the HSRAM is enabled.

Bit 5 – NVMCTRL: NVMCTRL AHB Clock Enable

NVMCTRL AHB Clock Enable

ValueDescription
0 The AHB clock for the NVMCTRL is stopped.
1 The AHB clock for the NVMCTRL is enabled.

Bit 4 – HMATRIXHS: HMATRIXHS AHB Clock Enable

HMATRIXHS AHB Clock Enable

ValueDescription
0 The AHB clock for the HMATRIXHS is stopped.
1 The AHB clock for the HMATRIXHS is enabled.

Bit 3 – DSU: DSU AHB Clock Enable

DSU AHB Clock Enable

ValueDescription
0 The AHB clock for the DSU is stopped.
1 The AHB clock for the DSU is enabled.

Bit 2 – APBC: APBC AHB Clock Enable

APBC AHB Clock Enable

ValueDescription
0 The AHB clock for the APBC is stopped.
1 The AHB clock for the APBC is enabled

Bit 1 – APBB: APBB AHB Clock Enable

APBB AHB Clock Enable

ValueDescription
0 The AHB clock for the APBB is stopped.
1 The AHB clock for the APBB is enabled.

Bit 0 – APBA: APBA AHB Clock Enable

APBA AHB Clock Enable

ValueDescription
0 The AHB clock for the APBA is stopped.
1 The AHB clock for the APBA is enabled.