| Bit31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| Access | |||||||
| Reset | |||||||
| Bit23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| Access | |||||||
| Reset | |||||||
| Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| Access | |||||||
| Reset | |||||||
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CHANNEL[7:0] | |||||||
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Channel Event Selection
These bits are used to select the channel to connect to the event user.
Note that to select channel m, the value (m+1) must be written to the USER.CHANNEL bit group.
| Value | Channel Number |
|---|---|
| 0x00 | No channel output selected |
| 0x01 | 0 |
| 0x02 | 1 |
| 0x03 | 2 |
| 0x04 | 3 |
| 0x05 | 4 |
| 0x06 | 5 |
| 0x07 | 6 |
| 0x08-0xFF | Reserved |
| USERm | User Multiplexer | Description | Path Type |
|---|---|---|---|
| m = 0 | Reserved | - | Reserved |
| m = 1 | PORT EV0 | Event 0 | Asynchronous, synchronous, and resynchronized paths |
| m = 2 | PORT EV1 | Event 1 | Asynchronous, synchronous, and resynchronized paths |
| m = 3 | PORT EV2 | Event 2 | Asynchronous, synchronous, and resynchronized paths |
| m = 4 | PORT EV3 | Event 3 | Asynchronous, synchronous, and resynchronized paths |
| m = 5 | DMAC CH0 | Channel 0 | Asynchronous, synchronous, and resynchronized paths |
| m = 6 | DMAC CH1 | Channel 1 | Asynchronous, synchronous, and resynchronized paths |
| m = 7 | DMAC CH2 | Channel 2 | Asynchronous, synchronous, and resynchronized paths |
| m = 8 | DMAC CH3 | Channel 3 | Asynchronous, synchronous, and resynchronized paths |
| m = 9 | TCC0 EV0 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 10 | TCC0 EV1 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 11 | TCC0 MC0 | Match/Capture 0 | Asynchronous, synchronous, and resynchronized paths |
| m = 12 | TCC0 MC1 | Match/Capture 1 | Asynchronous, synchronous, and resynchronized paths |
| m = 13 | TCC0 MC2 | Match/Capture 2 | Asynchronous, synchronous, and resynchronized paths |
| m = 14 | TCC0 MC3 | Match/Capture 3 | Asynchronous, synchronous, and resynchronized paths |
| m = 15 | TCC1 EV0 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 16 | TCC1 EV1 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 17 | TCC1 MC0 | Match/Capture 0 | Asynchronous, synchronous, and resynchronized paths |
| m = 18 | TCC1 MC1 | Match/Capture 1 | Asynchronous, synchronous, and resynchronized paths |
| m = 19 | TCC2 EV0 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 20 | TCC2 EV1 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 21 | TCC2 MC0 | Match/Capture 0 | Asynchronous, synchronous, and resynchronized paths |
| m = 22 | TCC2 MC1 | Match/Capture 1 | Asynchronous, synchronous, and resynchronized paths |
| m = 23 | TC0 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 24 | TC1 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 25 | TC2 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 26 | TC3 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 27 | TC4 | - | Asynchronous, synchronous, and resynchronized paths |
| m = 28 | ADC0 START | ADC start conversion | Asynchronous path only |
| m = 29 | ADC0 SYNC | Flush ADC | Asynchronous path only |
| m=30 to 33 | Reserved | - | Reserved |
| m = 34 | AC COMP0 | Start comparator 0 | Asynchronous path only |
| m = 35 | AC COMP1 | Start comparator 1 | Asynchronous path only |
| m=36 to 38 | Reserved | - | Reserved |
| m = 39 | PTC STCONC | PTC start conversion | Asynchronous path only |
| m = 40 | CCL LUTIN 0 | CCL input | Asynchronous path only |
| m = 41 | CCL LUTIN 1 | CCL input | Asynchronous path only |
| m = 42 | CCL LUTIN 2 | CCL input | Asynchronous path only |
| m = 43 | CCL LUTIN 3 | CCL input | Asynchronous path only |
| others | Reserved | - | Reserved |