Configuration Change Protection Register
Name:
CCP
Offset:
0x3C
Reset:
0x00
Access:
-
Bit76543210
CCP[7:0]
Access
Reset00000000

Bits 7:0 – CCP[7:0]: Configuration Change Protection

Configuration Change Protection

In order to change the contents of a protected I/O register the CCP register must first be written with the correct signature. After CCP is written the protected I/O registers may be written to during the next four CPU instruction cycles. All interrupts are ignored during these cycles. After these cycles interrupts are automatically handled again by the CPU, and any pending interrupts will be executed according to their priority.

When the protected I/O register signature is written, CCP[0] will read as one as long as the protected feature is enabled, while CCP[7:1] will always read as zero.

CCP[7:1] only have write access. CCP[0] has both read and write access.

Table 1. Signatures Recognized by the Configuration Change Protection Register
Signature Group Description
0xD8 IOREG: CLKMSR, CLKPSR, WDTCSR Protected I/O register