Pin Change Mask Register
Name:
PCMSK
Offset:
0x10
Reset:
0x00
Access:
-
Bit76543210
PCINT3PCINT2PCINT1PCINT0
AccessR/WR/WR/WR/W
Reset0000

Bits 3:0 – PCINTn: Pin Change Enable Mask [n = 3:0]

Pin Change Enable Mask [n = 3:0]

Each PCINT[3:0] bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT[3:0] is set and the PCIE0 bit in PCICR is set, pin change interrupt is enabled on the corresponding I/O pin. If PCINT[3:0] is cleared, pin change interrupt on the corresponding I/O pin is disabled.