Input Capture Register 0 Low byte
Name:
ICR0L
Offset:
0x22
Reset:
0x00
Access:
-
Bit76543210
(ICR0[7:0]) ICR0L
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 7:0 – (ICR0[7:0]) ICR0L[7:0]: Input Capture 0 Low byte

Input Capture 0 Low byte

ICR0H and ICR0L are combined into ICR0. It means ICR0L[7:0] is ICR0[7:0].

The Input Capture is updated with the counter (TCNT0) value each time an event occurs on the ICP0 pin (or optionally on the Analog Comparator output for Timer/Counter0). The Input Capture can be used for defining the counter TOP value.

The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read simultaneously when the CPU accesses these registers, the access is performed using an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit registers. Refer to Accessing 16-bit Registers for details.