Stack Pointer Register Low byte
Name:
SPL
Offset:
0x3D
Reset:
RAMEND
Access:
-
Bit
7
6
5
4
3
2
1
0
(SP[7:0]) SPL
Access
RW
RW
RW
RW
RW
RW
RW
RW
Reset
Bits 7:0 – (SP[7:0]) SPL[7:0]: Stack Pointer Register
Stack Pointer Register
SPL and SPH are combined into SP. It means SPL[7:0] is SP[7:0].