Alternate Functions of Port B

The Port B pins with alternate functions are shown in the table below:

Table 1. Port B Pins Alternate Functions
Port Pin	Alternate Functions
PB[0]	ADC0: ADC Input Channel 0 AIN0: Analog Comparator, Positive Input OC0A: Timer/Counter0 Compare Match A Output PCINT0: Pin Change Interrupt 0, Source 0 TPIDATA: Serial Programming Data
PB[1]	ADC1: ADC Input Channel 1 AIN1: Analog Comparator, Negative Input CLKI: External Clock ICP0: Timer/Counter0 Input Capture Input OC0B: Timer/Counter0 Compare Match B Output PCINT1: Pin Change Interrupt 0, Source 1 TPICLK: Serial Programming Clock
PB[2]	ADC2: ADC Input Channel 2 CLKO: System Clock Output INT0: External Interrupt 0 Source PCINT2: Pin Change Interrupt 0, Source 2 T0: Timer/Counter0 Clock Source
PB[3]	ADC3: ADC Input Channel 3 PCINT3: Pin Change Interrupt 0, Source 3 RESET: Reset Pin

The alternate pin configuration is as follows:

PB[0] – ADC0/AIN0/OC0A/PCINT0/TPIDATA
- ADC0: Analog to Digital Converter, Channel 0 (ATtiny5/10, only)
- AIN0: Analog Comparator Positive Input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator.
- OC0A, Output Compare Match output: The PB0 pin can serve as an external output for the Timer/Counter0 Compare Match A. The pin has to be configured as an output (DDB0 set (one)) to serve this function. This is also the output pin for the PWM mode timer function.
- PCINT0: Pin Change Interrupt source 0. The PB0 pin can serve as an external interrupt source for pin change interrupt 0.
- TPIDATA: Serial Programming Data.
PB[1] – ADC1/AIN1/CLKI/ICP0/OC0B/PCINT1/TPICLK
- ADC1: Analog to Digital Converter, Channel 1 (ATtiny5/10, only)
- AIN1: Analog Comparator Negative Input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator.
- CLKI: External Clock.
- ICP0: Input Capture Pin. The PB1 pin can act as an Input Capture pin for Timer/Counter0.
- OC0B: Output Compare Match output: The PB1 pin can serve as an external output for the Timer/Counter0 Compare Match B. The PB1 pin has to be configured as an output (DDB1 set (one)) to serve this function. The OC0B pin is also the output pin for the PWM mode timer function.
- PCINT1: Pin Change Interrupt source 1. The PB1 pin can serve as an external interrupt source for pin change interrupt 0.
- TPICLK: Serial Programming Clock.
PB[2] – ADC2/CLKO/INT0/PCINT2/T0
- ADC2: Analog to Digital Converter, Channel 2 (ATtiny5/10, only)
- CLKO: System Clock Output. The system clock can be output on pin PB2. The system clock will be output if CKOUT bit is programmed, regardless of the PORTB2 and DDB2 settings.
- INT0: External Interrupt Request 0
- PCINT2: Pin Change Interrupt source 2. The PB2 pin can serve as an external interrupt source for pin change interrupt 0.
- T0: Timer/Counter0 counter source.
PB[3] – ADC3/PCINT3/RESET
- ADC3: Analog to Digital Converter, Channel 3 (ATtiny5/10, only)
- PCINT3: Pin Change Interrupt source 3. The PB3 pin can serve as an external interrupt source for pin change interrupt 0.
- RESET:

The following tables relate the alternate functions of Port B to the overriding signals shown in the figure of Alternate Port Functions.

Table 2. Overriding Signals for Alternate Functions in PB[3:2]
Signal  Name	PB3/ADC3/RESET/PCINT3	PB2/ADC2/INT0/T0/CLKO/PCINT2
PUOE	RSTDISBL⁽¹⁾	CKOUT⁽²⁾
PUOV	1	0
DDOE	RSTDISBL⁽¹⁾	CKOUT⁽²⁾
DDOV	0	1
PVOE	0	CKOUT⁽²⁾
PVOV	0	(system clock)
PTOE	0	0
DIEOE	RSTDISBL⁽¹⁾ + (PCINT3 • PCIE0) + ADC3D	(PCINT2 • PCIE0) + ADC2D + INT0
DIEOV	RSTDISBL • PCINT3 • PCIE0	(PCINT2 • PCIE0) + INT0
DI	PCINT3 Input	INT0/T0/PCINT2 Input
AIO	ADC3 Input	ADC2 Input

Note:

RSTDISBL is 1 when the configuration bit is “0” (Programmed).
CKOUT is 1 when the configuration bit is “0” (Programmed).

Table 3. Overriding Signals for Alternate Functions in PB[1:0]
Signal  Name	PB1/ADC1/AIN1/OC0B/CLKI/ICP0/PCINT1	PB0/ADC0/AIN0/OC0A/PCINT0
PUOE	EXT_CLOCK⁽¹⁾	0
PUOV	0	0
DDOE	EXT_CLOCK⁽¹⁾	0
DDOV	0	0
PVOE	EXT_CLOCK⁽¹⁾+ OC0B Enable	OC0A Enable
PVOV	EXT_CLOCK⁽¹⁾• OC0B	OC0A
PTOE	0	0
DIEOE	EXT_CLOCK⁽¹⁾+ (PCINT1 • PCIE0) + ADC1D	(PCINT0 • PCIE0) + ADC0D
DIEOV	EXT_CLOCK⁽¹⁾• PWR_DOWN) + (EXT_CLOCK⁽¹⁾ • PCINT1 • PCIE0)	PCINT0 • PCIE0
DI	CLOCK/ICP0/PCINT1 Input	PCINT0 Input
AIO	ADC1/Analog Comparator Negative Input	ADC0/Analog Comparator Positive Input

Note:

EXT_CLOCK is 1 when external clock is selected as main clock.