8-bit PWM Mode

This timer can also be configured to run in 8-bit PWM mode where each of the register pairs in the 16-bit compare/capture register (TCB.CCMPH and TCB.CCMPL) are used as individual compare registers. The counter will continuously count from zero to CCMPL and the output will be set at BOTTOM and cleared when the counter reaches CCMPH.

When this peripheral is enabled and in PWM mode, changing the value of the compare/capture register will change the output, but the transition may output invalid values. It is hence recommended to

Disable the peripheral
Write compare/capture register to {CCMPH, CCMPL}
Write 0x0000 to count register
Re-enable the module.

CCMPH is the number of cycles for which the output will be driven high, CCMPL+1 is the period of the output pulse.

Output of the module for different capture register values are explained below.

CCMPL = 0 Output = 0
CCMPL = 0xFF
- CCMPH = 0 Output = 0
- 0 < CCMPH ≤ 0xFF Output = 1 for CCMPH cycles, low for the rest of the period
For 0 < CCMPL < 0xFF
- CCMPH = 0 Output = 0
- If 0 < CCMPH ≤ CCL Output = 1 for CCMPH cycles, low for the rest
- CCMPH = CCMPL + 1 Output = 1

Figure 1. 8-bit PWM Mode