VDD=3V, unless stated otherwise.
Table 1. Power Supply, Reference and Input Range| Symbol |
Description |
Conditions |
Min. |
Typ. |
Max. |
Unit |
| VDD |
Supply Voltage(1) |
|
1.8 |
3 |
5.5 |
V |
| RLoad |
Resistive External Load |
|
5 |
- |
- |
kΩ |
| CLoad |
Capacitive External Load |
|
- |
- |
30 |
pF |
| VOUT |
Output Voltage Range |
|
0.2 |
- |
VDD-0.2V |
V |
| Rchannel |
DC output Impedance |
|
- |
TBD |
- |
Ω |
| IOUT |
Output sink/source |
|
- |
1 |
- |
mA |
Note: 1. Supply voltage must meet the VDD specification for the VREF level used
as DAC reference.
Table 2. Clock and Timing Characteristics| Symbol |
Description |
Conditions |
Min. |
Typ. |
Max. |
Unit |
| fDAC |
Maximum Conversion Rate |
0.55V≤ VREF≤2.5V |
- |
350 |
- |
ksps |
| VREF=4.3 V |
- |
270 |
- |
ksps |
Table 3. Accuracy Characteristics| Symbol |
Description |
Conditions |
Min. |
Typ. |
Max. |
Unit |
| Res |
Resolution |
|
- |
|
8 |
bits |
| INL |
Integral Non-Linearity |
0.55V≤VREF≤4.3 |
- |
0.3 |
TBD |
LSB |
| DNL |
Differential Non-Linearity |
0.55V≤VREF≤4.3 |
- |
0.25 |
TBD |
LSB |
| EOFF |
Offset Error |
|
- |
1 |
- |
mV |
| Temperature drift, VREF=1.1V |
- |
0 |
- |
mV/K |
| Operating voltage drift, Vref=1.1V |
- |
0.5 |
- |
mV/V |
| EGAIN |
Gain Error |
Temperature drift, VREF=1.1V |
- |
0.055 |
- |
%/K |
| Operating voltage drift, VREF=1.1V |
- |
0.64 |
- |
%/V |