The Port B pins with alternate functions
are shown in the table below:
Table 1. Port B Pins Alternate
FunctionsPort
Pin |
Alternate
Functions |
PB7 |
XTAL2 (Chip Clock Oscillator pin 2)
TOSC2 (Timer Oscillator pin 2)
PCINT7 (Pin Change Interrupt 7)
|
PB6 |
XTAL1 (Chip Clock Oscillator pin 1 or External clock input)
TOSC1 (Timer Oscillator pin 1)
PCINT6 (Pin Change Interrupt 6)
|
PB5 |
SCK (SPI Bus Master clock Input)
PCINT5 (Pin Change Interrupt 5)
|
PB4 |
MISO (SPI Bus Master Input/Slave Output)
PCINT4 (Pin Change Interrupt 4)
|
PB3 |
MOSI (SPI Bus Master Output/Slave Input)
OC2A (Timer/Counter2 Output Compare Match A Output)
PCINT3 (Pin Change Interrupt 3)
|
PB2 |
SS (SPI Bus Master Slave select)
OC1B (Timer/Counter1 Output Compare Match B Output)
PCINT2 (Pin Change Interrupt 2)
|
PB1 |
OC1A (Timer/Counter1 Output Compare Match A Output)
PCINT1 (Pin Change Interrupt 1)
|
PB0 |
ICP1 (Timer/Counter1 Input Capture Input)
CLKO (Divided System Clock Output)
PCINT0 (Pin Change Interrupt 0)
|
The alternate pin configuration is as
follows:
- XTAL2/TOSC2/PCINT7 – Port B, Bit 7
- XTAL2: Chip clock Oscillator pin 2. Used as clock pin for crystal Oscillator or
Low-frequency crystal Oscillator. When used as a clock pin, the pin can not be
used as an I/O pin.
- TOSC2: Timer Oscillator pin 2. Used only if internal calibrated RC Oscillator is
selected as chip clock source, and the asynchronous timer is enabled by the
correct setting in ASSR. When the AS2 bit in ASSR is set (one) and the EXCLK bit
is cleared (zero) to enable asynchronous clocking of Timer/Counter2 using the
Crystal Oscillator, pin PB7 is disconnected from the port, and becomes the
inverting output of the Oscillator amplifier. In this mode, a crystal Oscillator
is connected to this pin, and the pin cannot be used as an I/O pin.
- PCINT7: Pin Change Interrupt source 7. The PB7 pin can serve as an external
interrupt source.
If PB7 is used as a clock pin, DDB7, PORTB7
and PINB7 will all read 0.
- XTAL1/TOSC1/PCINT6 – Port B, Bit 6
- XTAL1: Chip clock Oscillator pin 1. Used for all chip clock sources except
internal calibrated RC Oscillator. When used as a clock pin, the pin can not be
used as an I/O pin.
- TOSC1: Timer Oscillator pin 1. Used only if internal calibrated RC Oscillator is
selected as chip clock source, and the asynchronous timer is enabled by the
correct setting in ASSR. When the AS2 bit in ASSR is set (one) to enable
asynchronous clocking of Timer/Counter2, pin PB6 is disconnected from the port,
and becomes the input of the inverting Oscillator amplifier. In this mode, a
crystal Oscillator is connected to this pin, and the pin can not be used as an I/O
pin.
- PCINT6: Pin Change Interrupt source 6. The PB6 pin can serve as an external
interrupt source.
If PB6 is used as a clock pin, DDB6, PORTB6
and PINB6 will all read 0.
- SCK/PCINT5 – Port B, Bit 5
- SCK: Master Clock output, Slave
Clock input pin for SPI channel. When the SPI is enabled as a Slave, this pin is
configured as an input regardless of the setting of DDB5. When the SPI is enabled
as a Master, the data direction of this pin is controlled by DDB5. When the pin is
forced by the SPI to be an input, the pull-up can still be controlled by the
PORTB5 bit.
- PCINT5: Pin Change Interrupt
source 5. The PB5 pin can serve as an external interrupt source.
- MISO/PCINT4 – Port B, Bit 4
- MISO: Master Data input, Slave
Data output pin for SPI channel. When the SPI is enabled as a Master, this pin is
configured as an input regardless of the setting of DDB4. When the SPI is enabled
as a Slave, the data direction of this pin is controlled by DDB4. When the pin is
forced by the SPI to be an input, the pull-up can still be controlled by the
PORTB4 bit.
- PCINT4: Pin Change Interrupt
source 4. The PB4 pin can serve as an external interrupt source.
- MOSI/OC2A/PCINT3 – Port B, Bit 3
- MOSI: SPI Master Data output,
Slave Data input for SPI channel. When the SPI is enabled as a Slave, this pin is
configured as an input regardless of the setting of DDB3. When the SPI is enabled
as a Master, the data direction of this pin is controlled by DDB3. When the pin is
forced by the SPI to be an input, the pull-up can still be controlled by the
PORTB3 bit.
- OC2A: Output Compare Match output.
The PB3 pin can serve as an external output for the Timer/Counter2 Compare Match
A. The PB3 pin has to be configured as an output (DDB3 set '1') to serve this
function. The OC2A pin is also the output pin for the PWM mode timer
function.
- PCINT3: Pin Change Interrupt
source 3. The PB3 pin can serve as an external interrupt source.
- SS/OC1B/PCINT2
– Port B, Bit 2
- SS: Slave
Select input. When the SPI is enabled as a Slave, this pin is configured as an
input regardless of the setting of DDB2. As a Slave, the SPI is activated when
this pin is driven low. When the SPI is enabled as a Master, the data direction of
this pin is controlled by DDB2. When the pin is forced by the SPI to be an input,
the pull-up can still be controlled by the PORTB2 bit.
- OC1B: Output Compare Match output.
The PB2 pin can serve as an external output for the Timer/Counter1 Compare Match
B. The PB2 pin has to be configured as an output (DDB2 set (one)) to serve this
function. The OC1B pin is also the output pin for the PWM mode timer
function.
- PCINT2: Pin Change Interrupt
source 2. The PB2 pin can serve as an external interrupt source.
- OC1A/PCINT1 – Port B, Bit 1
- ICP1/CLKO/PCINT0 – Port B, Bit 0
- ICP1: Input Capture Pin. The PB0 pin can act as an Input Capture Pin for
Timer/Counter1.
- CLKO: Divided System Clock. The divided system clock can be output on the PB0
pin. The divided system clock will be output if the CKOUT Fuse is programmed,
regardless of the PORTB0 and DDB0 settings. It will also be output during
reset.
- PCINT0: Pin Change Interrupt source 0. The PB0 pin can serve as an external
interrupt source.
The tables below relate the alternate
functions of Port B to the overriding signals shown in Figure 1. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the MISO
signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT.
Table 2. Overriding Signals for Alternate
Functions in PB7...PB4Signal
Name |
PB7/XTAL2/TOSC2/PCINT7(1) |
PB6/XTAL1/TOSC1/PCINT6(1) |
PB5/SCK/PCINT5 |
PB4/MISO/PCINT4 |
PUOE |
INTRC • EXTCK+
AS2 |
INTRC +
AS2 |
SPE •
MSTR |
SPE • MSTR |
PUOV |
0 |
0 |
PORTB5 •
PUD |
PORTB4 •
PUD |
DDOE |
INTRC • EXTCK+
AS2 |
INTRC +
AS2 |
SPE •
MSTR |
SPE • MSTR |
DDOV |
0 |
0 |
0 |
0 |
PVOE |
0 |
0 |
SPE •
MSTR |
SPE •
MSTR |
PVOV |
0 |
0 |
SCK
OUTPUT |
SPI
SLAVE
OUTPUT |
DIEOE |
INTRC • EXTCK + AS2 +
PCINT7 • PCIE0 |
INTRC + AS2 + PCINT6 • PCIE0 |
PCINT5 •
PCIE0 |
PCINT4 •
PCIE0 |
DIEOV |
(INTRC +
EXTCK) • AS2 |
INTRC •
AS2 |
1 |
1 |
DI |
PCINT7
INPUT |
PCINT6
INPUT |
PCINT5 INPUT
SCK INPUT
|
PCINT4 INPUT
SPI MSTR INPUT
|
AIO |
Oscillator
Output |
Oscillator/Clock Input |
– |
– |
Notes: 1. INTRC means that one of the
internal RC Oscillators are selected (by the CKSEL fuses), EXTCK means that external clock
is selected (by the CKSEL fuses).
Table 3. Overriding Signals for Alternate
Functions in PB3...PB0Signal
Name |
PB3/MOSI/TXD1/OC2A/PCINT3 |
PB2/SS/OC1B/PCINT2 |
PB1/OC1A/PCINT1 |
PB0/ICP1/CLKO/PCINT0 |
PUOE |
SPE •
MSTR + TXEN1 |
SPE •
MSTR |
0 |
0 |
PUOV |
PORTB3 •
PUD |
PORTB2 •
PUD |
0 |
0 |
DDOE |
SPE •
MSTR + TXEN1 |
SPE •
MSTR |
0 |
0 |
DDOV |
0 |
0 |
0 |
0 |
PVOE |
SPE • MSTR +
OC2A ENABLE |
OC1B
ENABLE |
OC1A
ENABLE |
0 |
PVOV |
SPI MSTR
OUTPUT + OC2A + TXD1 |
OC1B |
OC1A |
0 |
DIEOE |
PCINT3 •
PCIE0 |
PCINT2 •
PCIE0 |
PCINT1 •
PCIE0 |
PCINT0 •
PCIE0 |
DIEOV |
1 |
1 |
1 |
1 |
DI |
PCINT3 INPUT
SPI SLAVE INPUT
|
PCINT2 INPUT
SPI SS
|
PCINT1
INPUT |
PCINT0 INPUT
ICP1 INPUT
|
AIO |
– |
– |
– |
– |