The XMEGA-A3BU Xplained headers J1, J2, J3 and J4 offer access to the I/O of the
microcontroller in order to expand the board e.g. by mounting a top module onto the
board.
The header J1 offers digital communication interfaces like UART, TWI and SPI. The
table below shows how the XMEGA is connected to the header. When using TWI
note that no pull-ups are mounted on the board from the factory, so it is required
to either enable the internal pull-ups of the device or to mount the external
pull-ups on the available footprints (R200 and R201). Refer to the assembly
drawing in the design documentation for the location of these footprints.
Table 1. Expansion header J1
| Pin on J1 |
Name on J1 |
XMEGA pin |
Shared with on-board functionality |
| 1 |
SDA |
PC0 |
|
| 2 |
SCL |
PC1 |
|
| 3 |
RXD |
PC2 |
|
| 4 |
TXD |
PC3 |
|
| 5 |
SS |
PC4 |
|
| 6 |
MOSI |
PC5 |
|
| 7 |
MISO |
PC6 |
|
| 8 |
SCK |
PC7 |
|
| 9 |
GND |
|
|
| 10 |
VCC_P3V3 |
|
|
The header J2 is connected to analog ports of the XMEGA as shown in the following
table.
Table 2. Expansion header J2
| Pin on J2 |
Name on J2 |
XMEGA pin |
Shared with on-board functionality |
| 1 |
ADC0 |
PB0 |
|
| 2 |
ADC1 |
PB1 |
|
| 3 |
ADC2 |
PB2 |
|
| 4 |
ADC3 |
PB3 |
|
| 5 |
ADC4 |
PA4 |
|
| 6 |
ADC5 |
PA5 |
|
| 7 |
ADC6 |
PA6 |
|
| 8 |
ADC7 |
PA7 |
|
| 9 |
GND |
|
|
| 10 |
VCC_P3V3 |
|
|
The I/O connected to the expansion header J3 is shared with on-board features as
sensors and JTAG interface. Therefore care must be taken when J3 is used for
expansions. The following table shows the mapping of the XMEGA I/O to J3.
Table 3. Expansion header J3
| Pin on J3 |
Name on J3 |
XMEGA pin |
Shared with on-board functionality |
| 1 |
PA0 |
PA0 |
Light sensor1
|
| 2 |
PA1 |
PA1 |
Temperature sensor1
|
| 3 |
PA2 |
PA2 |
Filter output1
|
| 4 |
PA3 |
PA3 |
Display reset |
| 5 |
PB4 |
PB4 |
JTAG TMS |
| 6 |
PB5 |
PB5 |
JTAG TDI |
| 7 |
PB6 |
PB6 |
JTAG TCK |
| 8 |
PB7 |
PB7 |
JTAG TDO |
| 9 |
GND |
|
|
| 10 |
VCC_P5V0 |
|
|
The header J4 offers digital communication interfaces such as UART and TWI but
care must be taken because some pins are also connected to on-board
peripherals.
Table 4. Expansion header J4
| Pin on J4 |
Name on J4 |
XMEGA pin |
Shared with on-board functionality |
| 1 |
SDA |
PE0 |
|
| 2 |
SCL |
PE1 |
|
| 3 |
RXD |
PE2 |
|
| 4 |
TXD |
PE3 |
|
| 5 |
SS |
PD4 |
Display register select2
|
| 6 |
MOSI |
PD5 |
Serial flash MOSI |
| 7 |
MISO |
PD6 |
Display and serial flash MISO |
| 8 |
SCK |
PD7 |
Display and serial flash clock input |
| 9 |
GND |
|
|
| 10 |
VCC_P3V3 |
|
|