| Block Diagram | |
| NVM Controller bus connection changed from Master to Slave. | |
| Clock System | |
| Register Synchronization updated by splitting the section into Common Synchronizer Register Synchronization and Distributed Synchronizer Register Synchronization. | |
| Electrical Characteristics | |
| Analog-to-Digital (ADC) characteristics: Added note defining gain accuracy parameter in: - ADC Differential Mode, Table 2 - ADC Single-Ended Mode, Table 4 |
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| Errata | |
| Updated errata for revision A, B and C: Added Errata Reference 13140, 12860. | |