ADC

Operating conditions:

V_DD = 1.8 to 5.5V
Temperature = -40°C to 125°C
DUTYCYC = 25%
CLK_ADC = 13 * f_ADC
SAMPCAP is 10 pF for 0.55V reference, while it is set to 5 pF for V_REF≥1.1V
Applies for all allowed combinations of V_REF selections and Sample Rates unless othervise noted

Table 1. Power Supply, Reference, and Input Range
Symbol	Description	Conditions	Min.	Typ.	Max.	Unit
V_DD	Supply voltage		1.8	-	5.5	V
V_REF	Reference voltage	REFSEL = Internal reference	0.55	-	V_DD-0.4	V
V_REF	Reference voltage	REFSEL = V_DD	1.8	-	5.5	V
C_IN	Input capacitance	SAMPCAP=5 pF	-	5	-	pF
C_IN	Input capacitance	SAMPCAP=10 pF	-	10	-	pF
V_IN	Input voltage range		0	-	V_REF	V
I_BAND	Input bandwidth	1.1V≤V_REF	-	-	57.5	kHz

Table 2. Clock and Timing Characteristics
Symbol	Description	Conditions	Min.	Typ.	Max.	Unit
f_ADC	Sample rate	1.1V≤V_REF	15	-	115	ksps
		1.1V≤V_REF (8-bit resolution)	15	-	150
		V_REF=0.55V (10 bits)	7.5	-	20
CLK_ADC	Clock frequency	V_REF=0.55V (10 bits)	100	-	260	kHz
		1.1V≤V_REF (10 bits)	200	-	1500
		1.1V≤V_REF (8-bit resolution)	200	-	2000⁽¹⁾
Ts	Sampling time		2	2	33	CLK_ADC cycles
T_CONV	Conversion time (latency)	Sampling time = 2 CLK_ADC	8.7	-	50	µs
T_START	Start-up time	Internal V_REF	-	22	-	µs

Note:

1.50% duty cycle is required for clock frequencies above 1500 kHz.

Table 3. Accuracy Characteristics⁽²⁾
Symbol	Description	Conditions		Min.	Typ.	Max.	Unit
Res	Resolution			-	10	-	bit
INL	Integral Non-linearity	REFSEL = INTERNAL V_REF=0.55V	f_ADC=7.7 ksps	-	1.0	-
		REFSEL = INTERNAL or VDD	f_ADC=15 ksps	-	1.0	-	LSB
		REFSEL = INTERNAL or VDD 1.1V≤V_REF	f_ADC=77 ksps	-	1.0	-
		REFSEL = INTERNAL or VDD 1.1V≤V_REF	f_ADC=115 ksps	-	1.2	-
DNL⁽¹⁾	Differential Non-linearity	REFSEL = INTERNAL V_REF=0.55V	f_ADC=7.7 ksps	-	0.6	-	LSB
		REFSEL = INTERNAL or VDD	f_ADC=15 ksps	-	0.4	-
		REFSEL = INTERNAL or VDD 1.1V≤V_REF	f_ADC=77 ksps	-	0.4	-
		REFSEL = INTERNAL 1.1V≤V_REF	f_ADC=115 ksps	-	0.6	-
		REFSEL = VDD 1.1V≤V_REF	f_ADC=115 ksps	-	0.6	-
EABS	Absolute accuracy	REFSEL = INTERNAL V_REF = 1.1V	T=[0-105]°C V_DD = [1.8V- 3.6V]	-	3	-	LSB
		REFSEL = INTERNAL V_REF = 1.1V	V_DD = [1.8V - 3.6V]	-	3	-
		REFSEL = V_DD		-	2	-
		REFSEL = INTERNAL		-	3	-
EGAIN	Gain error	REFSEL = INTERNAL V_REF = 1.1V	T=[0 - 105]°C V_DD = [1.8V - 3.6V]	-	5	-	LSB
		REFSEL = INTERNAL V_REF = 1.1V	V_DD = [1.8V - 3.6V]	-	5	-
		REFSEL = V_DD		-	2	-
		REFSEL =INTERNAL		-	5	-
EOFF	Offset error			-	-0.5	-	LSB

Note:

1.A DNL error of less than or equal to 1 LSB ensures a monotonic transfer function with no missing codes.
2.These values are based on characterization and not covered by production test limits.
3.Reference setting and f_ADC must fulfill the specification in "Clock and Timing Characteristics" and "Power supply, Reference, and Input Range" tables.