During the course of automatic baud detection, the
ABDOVF bit will be set if the baud rate counter overflows before the fifth
falling edge is detected on the RX pin. The ABDOVF bit indicates that the counter has
exceeded the maximum count that can fit in the 16 bits of the UxBRG register pair. After
the ABDOVF bit has been set, the state machine continues to search until the fifth
falling edge is detected on the RX pin. Upon detecting the fifth falling RX edge, the
hardware will set the ABDIF Interrupt flag and clear the ABDEN bit. The UxBRG register
values retain their previous value. The
ABDIF flag and ABDOVF flag can be cleared by software directly. To generate
an interrupt on an Auto-baud Overflow condition, all the following bits must be set:
- ABDOVE bit
- UxEIE bit in the PIEx
register
- Global Interrupt Enable bits
To terminate the auto-baud process before the ABDIF flag is set, clear the ABDEN bit,
then clear the ABDOVF bit.