Register Summary

Offset Name Bit Pos.                
0x00 CTRLA 7:0             ENABLE SWRST
0x01 CTRLB 7:0         START3 START2 START1 START0
0x02 EVCTRL 7:0     WINEO1 WINEO0 COMPEO3 COMPEO2 COMPEO1 COMPEO0
0x03 15:8 INVEI3 INVEI2 INVEI1 INVEI0 COMPEI3 COMPEI2 COMPEI1 COMPEI0
0x04 INTENCLR 7:0     WIN1 WIN0 COMP3 COMP2 COMP1 COMP0
0x05 INTENSET 7:0     WIN1 WIN0 COMP3 COMP2 COMP1 COMP0
0x06 INTFLAG 7:0     WIN1 WIN0 COMP3 COMP2 COMP1 COMP0
0x07 STATUSA 7:0 WSTATE1[1:0] WSTATE0[1:0] STATE3 STATE2 STATE1 STATE0
0x08 STATUSB 7:0         READY3 READY2 READY1 READY0
0x09 DBGCTRL 7:0               DBGRUN
0x0A WINCTRL 7:0   WINTSEL1[1:0] WEN1   WINTSEL0[1:0] WEN0

0x0B

 Reserved                  
0x0C SCALERn0 7:0     VALUE[5:0]
0x0D SCALERn1 7:0     VALUE[5:0]
0x0E SCALERn2 7:0     VALUE[5:0]
0x0F SCALERn3 7:0     VALUE[5:0]
0x10 COMPCTRL0 7:0   RUNSTDBY   INTSEL[1:0] SINGLE ENABLE  
0x11 15:8 SWAP MUXPOS[2:0]   MUXNEG[2:0]
0x12 23:16         HYSTEN   SPEED[1:0]
0x13 31:24     OUT[1:0]   FLEN[2:0]
0x14 COMPCTRL1 7:0   RUNSTDBY   INTSEL[1:0] SINGLE ENABLE  
0x15 15:8 SWAP MUXPOS[2:0]   MUXNEG[2:0]
0x16 23:16         HYSTEN   SPEED[1:0]
0x17 31:24     OUT[1:0]   FLEN[2:0]
0x18 COMPCTRL2 7:0   RUNSTDBY   INTSEL[1:0] SINGLE ENABLE  
0x19 15:8 SWAP MUXPOS[2:0]   MUXNEG[2:0]
0x1A 23:16         HYSTEN   SPEED[1:0]
0x1B 31:24     OUT[1:0]   FLEN[2:0]
0x1C COMPCTRL3 7:0   RUNSTDBY   INTSEL[1:0] SINGLE ENABLE  
0x1D 15:8 SWAP MUXPOS[2:0]   MUXNEG[2:0]
0x1E 23:16         HYSTEN   SPEED[1:0]
0x1F 31:24     OUT[1:0]   FLEN[2:0]
0x20 SYNCBUSY 7:0   COMPCTRL3 COMPCTRL2 COMPCTRL1 COMPCTRL0 WINCTRL ENABLE SWRST
0x21 15:8                
0x22 23:16                
0x23 31:24                
Parent topic: AC – Analog Comparators