The NVM User Row contains calibration data that are automatically read at device power on.
The NVM User Row can be read at address 0x804000.
To write the NVM User Row, refer to the NVMCTRL - Non-Volatile Memory Controller.
Note that when writing to the user row the values do not get loaded by the other modules on the device until a device reset occurs.
| Bit Position | Name | Usage | Production setting | Related Peripheral Register |
|---|---|---|---|---|
| 2:0 | BOOTPROT | Used to select one of eight different bootloader sizes. | 7 | NVMCTRL |
| 3 | Reserved | - | 1 | - |
| 6:4 | EEPROM | Used to select one of eight different EEPROM sizes. | 7 | NVMCTRL |
| 7 | Reserved | - | 1 | - |
| 13:8 | BODVDD Level | BODVDD Threshold Level at power on. | 8 | SUPC.BODVDD |
| 14 | BODVDD Disable | BODVDD Disable at power on. | 0 | SUPC.BODVDD |
| 16:15 | BODVDD Action | BODVDD Action at power on. | 1 | SUPC.BODVDD |
| 25:17 | Reserved | Voltage Regulator Internal BOD (BODCORE) configuration. These bits are written in production and must not be changed. | 0xA8 | - |
| 26 | WDT Enable | WDT Enable at power on. | 0 | WDT.CTRLA |
| 27 | WDT Always-On | WDT Always-On at power on. | 0 | WDT.CTRLA |
| 31:28 | WDT Period | WDT Period at power on. | 0xB | WDT.CONFIG |
| 35:32 | WDT Window | WDT Window mode time-out at power on. | 0xB | WDT.CONFIG |
| 39:36 | WDT EWOFFSET | WDT Early Warning Interrupt Time Offset at power on. | 0xB | WDT.EWCTRL |
| 40 | WDT WEN | WDT Timer Window Mode Enable at power on. | 0 | WDT.CTRLA |
| 41 | BODVDD Hysteresis | BODVDD Hysteresis configuration at power on. | 0 | SUPC.BODVDD |
| 42 | Reserved | Voltage Regulator Internal BOD (BODCORE) configuration. These bits are written in production and must not be changed. | 0 | - |
| 47:43 | Reserved | - | 0x1F | - |
| 63:48 | LOCK | NVM Region Lock Bits. | 0xFFFF | NVMCTRL |