I2CxPIR

I2C Interrupt Flag Register

Note:

1.Enabled interrupt flags are OR’ed to produce the PIRx[I2CxIF] bit.
2.ACKTIF is not set by a matching 10-bit high address byte with the R/W bit clear. It is only set after the matching low address byte is shifted in.

Bit 7 – CNTIF: Byte Count Interrupt Flag(1)

Byte Count Interrupt Flag⁽¹⁾

Value	Description
`1`	Set on the 9th falling SCL edge when I2CxCNT = `0`
`0`	I2CxCNT value is not zero

Acknowledge Status Time Interrupt Flag (used only when MODE = 0xx or MODE = 11x)^(1,2)

Value	Description
`1`	Acknowledge sequence detected, set on the 9th falling SCL edge for any byte when addressed as a slave
`0`	Acknowledge sequence not detected

Data Write Interrupt Flag (used only when MODE = 0xx or MODE = 11x)⁽¹⁾

Value	Description
`1`	Data byte detected, set on the 8th falling SCL edge for a received data byte
`0`	Data byte not detected

Address Interrupt Flag (used only when MODE = 0xx or MODE = 11x)⁽¹⁾

Value	Description
`1`	Address detected, set on the 8th falling SCL edge for a matching received address byte
`0`	Address not detected

Stop Condition Interrupt Flag⁽¹⁾

Value	Description
`1`	Stop condition detected
`0`	Stop condition not detected

Restart Condition Interrupt Flag⁽¹⁾

Value	Description
`1`	Restart condition detected
`0`	Restart condition not detected

Start Condition Interrupt Flag⁽¹⁾

Value	Description
`1`	Start condition detected
`0`	Start condition not detected