With the CVD being an integrated feature of the ADC2 module, it is important to make sure that the ADC2 is properly configured for use. The first step is to ensure that the I/O pin is configured correctly. The output driver on that port must be disabled by setting the corresponding bit in the TRISx register and configuring the pin as an analog channel by setting the corresponding bit in the ANSELx register. Once this has been completed, the next step is to configure the ADC2 module. Refer to Microchip’s ADC2 Technical Brief (TB3146) or the device data sheet for more specific information about configuration of the ADC2. A few key settings are mentioned below:
The next step is to configure the CVD specific registers in the ADC2 module. These are covered in more detail later in this technical brief, however, it is important to remember to set up precharge control, acquisition control, additional sample and hold capacitance and the guard ring circuit. The CVD feature offers the ability to choose where the previous sample input select bits come from by setting the PSIS bit of the ADCON register.