JTAG Interface and On-chip Debug System
Features
Overview
TAP – Test Access Port
TAP Controller
Using the Boundary-scan Chain
Using the On-chip Debug System
On-chip Debug Specific JTAG Instructions
Using the JTAG Programming Capabilities
Bibliography
IEEE 1149.1 (JTAG) Boundary-scan
Data Registers
Boundry-scan Specific JTAG Instructions
Boundary-scan Chain
ATmega324PB Boundary-scan Order
Boundary-scan Description Language Files
Register Description