In Master 10-bit Addressing modes, the slave’s 10-bit address and
R/W bit value are loaded into either the I2CxADB0 and
I2CxADB1
registers (when ABD = 0), or I2CxTXB (when
ABD = 1). When the master intends to read data
from the slave, it must first transmit the full 10-bit address with the
R/W bit clear (R/W =
0), issue a Restart condition, then transmit the address high byte
with the R/W bit set (R/W =
1). When the master intends to write data to the slave, it must
transmit the full 10-bit address with the R/W bit clear
(R/W = 0).