I2C Slave Mode Operation

The I²C module provides four slave operation modes as selected by the I²C Mode Select (MODE) bits:

I²C Slave mode with recognition of up to four 7-bit addresses
I²C Slave mode with recognition of up to two masked 7-bit addresses
I²C Slave mode with recognition of up to two 10-bit addresses
I²C Slave mode with recognition of one masked 10-bit address

During operation, the slave device waits until module hardware detects a Start condition on the bus. Once the Start condition is detected, the slave waits for the incoming address information to be received by the receive shift register. The address is then compared to the addresses stored in the I²C Address 0/1/2/3 registers (I2CxADR0, I2CxADR1, I2CxADR2, I2CxADR3), and if an address match is detected, slave hardware transfers the matching address into either the I2CxADB0/I2CxADB1 registers or the I2CxRXB register, depending on the state of the Address Buffer Disable (ABD) bit. If there are no address matches, there is no response from the slave.